CS计算机代考程序代写 assembly All registers and memory locations are 32 bits, the concept of byte does not apply except in the few special string-processing instructions. When characters are stored to make a string, they are packed four per memory location, with the first character of the string being in the least-significant 8 bits.

All registers and memory locations are 32 bits, the concept of byte does not apply except in the few special string-processing instructions. When characters are stored to make a string, they are packed four per memory location, with the first character of the string being in the least-significant 8 bits.
Negative numbers are represented in the two’s complement format.
Floating point numbers are stored in the intel 32-bit floating format, whatever that is.
Bits are numbered from 0, the least significant, to 31 the most significant. In numeric representations, bit 31 is the sign bit.
There are 16 regular registers, numbered from 0 to 15.
R0 is a scratch register, with slightly limited functionality
R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12 are general purpose registers SP, the stack pointer, is encoded as register 13
FP, the frame pointer, is encoded as register 14
PC, the program counter, is encoded as register 15
The instruction format
I is the Indirect bit. Two’s complement, range -32768 to +32767
If bits 16-19 are all zero, i.e. “Index Register” indicates R0, then no index register is used when the instruction executes. Thus it is not possible to use R0 as an index register.
In the description of an instruction, the term reg refers to the register indicated by bits 20 to 23 (main register), and operand refers to the combination of indirect bit, index register, and numeric operand as illustrated on the next two pages.
If the term value appears in the description, it refers to the value of the operand, which is calculated as follows:
part1 = numeric operand; part2 = 0;
if (index register  0)
part2 = contents of indicated index register total = part1 + part2;
if (indirect bit  0)
value = contents of memory location [total];
else
value = total;
If the sequence “reg ← x” appears, it means that the content of the main register is replaced by x.
If the sequence “destination ← x” appears, then the operand my consist of just an index register, in which case the content of the register is replaced by x, otherwise the indirect bit must be set, and the content of memory location [total] is replaced by x.
Operation
I
Main Register
Index Register
Numeric Operand
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31

Assembly Examples:
RET
0100101 0 0000 0000 0000000000000000 4AOOOOOO
INC R6
0000100 0 0110 0000 0000000000000000 O86OOOOO
0000001 0 0010 0000 0000000000100100 O22OOO24
0000110 0 0111 0011 0000000000000000 OC73OOOO
0000001 0 0111 0011 0000000000001100 O273OOOC
0000110 1 0100 0011 0000000000000000 OD43OOOO
STORE R2, [1234]
0000011 1 0010 0000 0000010011010010 O72OO4D2
STORE R2, [R5 ‐ 375]
0000011 1 0010 0101 1111111010001001 O725FE89
Operation Indirect bit Main register Index register Numeric
Operation Indirect bit Main register Index register Numeric
Operation Indirect bit Main register Index register Numeric
Operation Indirect bit Main register Index register Numeric
Operation Indirect bit Main register Index register Numeric
Operation Indirect bit Main register Index register Numeric
Operation Indirect bit Main register Index register Numeric
Operation Indirect bit Main register Index register Numeric
= 37 =0 =0 =0 =0
=4 =0 =6 =0 =0
=1 =0 =2 =0 =36
=6 =0 =7 =3 =0
=1 =0 =7 =3 =12
=6 =1 =4 =3 =0
=3 =1 =2 =0
= 1234
=3 =1 =2 =5
= -375

Execution Examples, starting from these values already in memory:
location
contents
27100 592
27101 759
27102 43
27103 27105
27104 2
27105 682
27106 11
27107 22
27108 33
STORE R6, [27101]
INC R6
STORE R6, [R4 ‐ 2]
PUSH R2
PUSH [R4]
POP R4
STORE R6, 27101
The value
The value
The value
The value
The value
The value
The content of memory location 27101 is changed from 759 to 48 The value stored in register 6 is now 49
stored in register 2 is now 5 stored in register 3 is now 9 stored in register 4 is now 27102 stored in register 5 is now 592 stored in register 6 is now 43 stored in register 6 is now 48
The content of memory location 27100 is changed from 592 to 49 The value stored in register 13 (stack pointer) is now 27108
The content of memory location 27107 is changed from 22 to 5 The value stored in register 13 (stack pointer) is now 27107
The content of memory location 27106 is changed from 11 to 43 The value stored in register 13 (stack pointer) is now 27106
The value stored in register 4 is now 43
The value stored in register 13 (stack pointer) is now 27107
Fails to execute, as the operand does not address memory.

opcode mnemonic
0 HALT
3 STORE reg, operand
action
the processor is halted, execution of instructions stops.
reg ← value
reg ← ( reg  FFFF ) + ( value « 16 )
the most significant 16 bits of the register are replaced
destination ← reg
destination ← value + 1
destination ← value ‐ 1
reg ← reg + value
reg ← reg ‐ value
reg ← reg × value
reg ← reg ÷ value
reg ← reg modulo value
reg ← value ‐ reg
reg ← value ÷ reg
reg ← value modulo reg
reg ← reg  value
reg ← reg  value
reg ← reg  value
reg ← ~ value
flagZ ← 1 if most sig. (value) bits of reg all 0, otherwise 0 reg ← reg « value, zeros being inserted at the right
flagZ ← 1 if least sig. (value) bits of reg all 0, otherwise 0 reg ← reg » value, zeros being inserted at the left