# 代写代考 EEEE4122 electrical & electronics 电子电气 – cscodehelp代写

The University of Nottingham

DEPARTMENT OF ELECTRICAL AND ELECTRONIC ENGINEERING

Sample Practice Paper 2

EEEE4122 ELECTRICAL & ELECTRONICS FUNDAMENTALS FOR MSC STUDENTS (20 credit) Time allowed 1.5 Hours

Candidates may complete the front cover of their answer book and sign their desk card but must NOT write anything else until the start of the examination period is announced.

Answer ALL Questions

Only silent, self-contained calculators with a Single-Line Display or Dual-Line Display are permitted in this examination.

Dictionaries are not allowed with one exception. Those whose first language is not English may use a standard translation dictionary to translate between that language and English provided that neither language is the subject of this examination. Subject specific translation dictionaries are not permitted.

No electronic devices capable of storing and retrieving text, including electronic dictionaries, may be used.

EEEE4122

DO NOT turn examination paper over until instructed to do so

Answer ALL Questions

Turn Over

SECTION A

Phasor Sketch:

(i) Calculate the rms value and phase angle of the supply voltage V. (ii) Sketch the phasor diagram for this system.

Answers: Vrms = 19V, phase angle = 21.8o.

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QUESTION 1

(a) Which of the following is untrue in describing the characteristics of transmission lines & cables? POSSIBLE ANSWERS:

(1) Series resistance & inductance; (2) Parallel capacitance; (3) Parallel conductance; (4) Parallel inductance. [1.5 Marks]

(b) Which of the following is untrue in describing a power-flow relationship in a transmission line? POSSIBLE ANSWERS:

(1) Transmission voltage drop depends primarily on the reactive power of load; (2) Transmission voltage drop depends primarily on the real power of load; (3) Phase difference between two ends of the line determines the real power flow; (4) Phase difference depends on the effective cross sectional area of the line. [1.5 Marks]

(c) For a given load, the T&D losses can be reduced by which of the following? POSSIBLE ANSWERS:

(1) Increasing the T&D voltage; (2) Increasing the T&D current; (3) Increasing the distance of transmission; (4) None of these. [1.5 Marks]

(d) Doubling the T&D voltage reduces the potential losses to which of the following? POSSIBLE ANSWERS:

(1) 0.10; (2) 0.25; (3) 0.50; (4) 0.75. [1.5 Marks]

QUESTION 2

(a) Two voltages are defined as VA = 115cos(2f.t + 25o) and VB = 95cos(2f.t + 45o) where the supply frequency is 60 Hz. Calculate the sum of these voltages using the phasor approach, and also convert your answer to the time domain.

Answers: Vrms = 146.2V, phase angle = 33.9o and V(t) = 206.8cos(377.t + 33.9o)

[4 Marks]

(b) A 50 Hz V volt sinusoidal voltage source is connected over a series combination of resistance and inductance as shown below. The voltage across the resistor and inductor are measured as VR = 25cos(ω.t) and VL = 10cos(ω.t + (/2)) respectively. Using Kirchoff’s Voltage Law and the phasor approach:

(c) A series connection of an inductor and resistor is subsequently connected in parallel with a capacitor as shown in diagram below. A sinusoidal voltage of frequency f (Hz) is applied across the combination. The current flowing in the inductor/resistor branch and the

[6 Marks]

Answers: Irms = 0.308A, phase angle = -6.6o.

QUESTION 3

[6 Marks]

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capacitor are measured as IRL = 0.5cos(2f.t – (30o)) and IC = 0.2cos(2f.t + 90o). Using Kirchoff’s Current Law and the phasor approach, calculate the rms value and phase angle of the supply current I, and sketch the phasor diagram for this system.

(a) A 2Ω resistor (Z1) is connected in series with a parallel combination of impedances Z2 and Z3. Z2 is a 0.01H inductor whilst Z3 consists of a 1Ω resistor in series with a 0.001F capacitor. This circuit is supplied from a voltage which is defined by VS = 162cos(377t). Calculate the supply current IS(t) and both the active and reactive power drawn from the said supply.

Answers: IS(t) = 18.21cos (377t + 21.5o), 1380W, -543Var.

Note: Numerical value of PF does not tell us whether current lags or leads the voltage. Hence we define Lagging PF (+Q) when I lags V and Leading PF (-Q) when I leads V.

– see slides 104 and 105 in “EEEE4122_CircuitANALYSIS_AlexCHONG” notes on Moodle.

[6 Marks]

(b) Two loads are connected in series and have impedances of Z1 = 4 – j3 and Z2 = 6 + j8. They are supplied with power from a 220V, 50Hz source. Calculate the following:

(i) The total apparent power required from the supply and the supply power factor

(ii) The active and reactive powers absorbed by each load.

Answers: 4334 VA, PF=0.89, P1=1552 W, Q1 = -1164 VAr, P2 = 2328 W, Q2 = +3104 VAr.

[6 Marks]

TOTAL FOR SECTION A [34 MARKS]

Phasor Sketch:

SECTION B

QUESTION 4

(a) What is the Laplace transform of 3t? POSSIBLE ANSWERS:

(1) (𝑠) = 3 ; (2) 𝐻(𝑠) = 3 ; (3) 𝐻(𝑠) = 3𝑠2; (4) 𝐻(𝑠) = 6 𝑠2 𝑠 𝑠2

[3 Marks]

.

(b) What is the closed loop transfer function 𝐶(𝑠) for the control loop in Fig. Q4b below?

𝐶(𝑠) = 𝑅(𝑠)

following statements about the Root Locus method are correct? (i) It can be easily used with measured data.

(ii) It explicitly shows all closed-loop poles.

(iii) It is a good indicator of the transient response.

(iv) Performance and stability can be inferred from the same plot.

(v) It is easy to handle time delays correctly. POSSIBLE ANSWERS:

(1) (i) and (ii); (2) (ii) and (iv); (3) (iv) and (v); (4) (ii) and (iii).

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POSSIBLE ANSWERS: (1) 𝐶(𝑠) = 𝐺(𝑠) ; (2)

𝑅(𝑠)

Fig. Q4b: Feedback control loop. 𝐺(𝑠) ; (3) 𝐶(𝑠) = 𝐺(𝑠) ; (4) 𝐶(𝑠) =

1+𝐺(𝑠)𝐻(𝑠) 𝑅(𝑠) 1+𝐺(𝑠) 𝑅(𝑠)

(c) The response of a system can be analysed using either Bode plots or the root locus method. Which of the

𝑅(𝑠)

𝐺(𝑠) . 1+𝐺(𝑠)

[3 Marks]

[3 Marks]

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QUESTION 5

(a) Which of the following statements is true?

(i) The energy stored in a capacitor is given by 𝐸𝑛𝑒𝑟𝑔𝑦 = 𝑣2.

2𝐶

(ii) The effects of source inductance can be mitigated with a decoupling capacitor.

(iii) Capacitors are often used as voltage integrators

(iv) If Δ𝑉 = 𝑉(𝑡2) − 𝑉(𝑡2) = 0 in a voltage waveform across a capacitor, then the area under the waveform of the current through the capacitor is zero.

POSSIBLE ANSWERS:

(1) (i), (ii) and (iv); (2) (i) and (iv); (3) (ii) and (iv); (4) (ii) and (iii). [3 Marks]

(b) Consider a 3-phase transmission line whose phase voltages are given by: 𝑉 = 𝑉 ∠0∘, 𝑉 = 𝑉 ∠−120∘, and

𝑉 = 𝑉 ∠120∘. What is the phase of the line voltage VCA? 𝐶𝑁 𝑝

POSSIBLE ANSWERS:

(1) 30; (2) 90; (3) -120; (4) 150.

𝐴𝑁 𝑝 𝐵𝑁 𝑝

(c) There are three classes of power switching device: uncontrolled devices; controlled devices; and latching devices? Which of the following is NOT a controlled device?

POSSIBLE ANSWERS:

(1) Bipolar transistor; (2) MOSFET; (3) Thyristor; (4) IGBT.

[3 Marks]

[3 Marks]

QUESTION 6

(a)

Determine the Laplace transform 𝑣0(𝑠) (without initial conditions) of the transfer function of the circuit in 𝑖(𝑠)

(b)

Using the Final Value Theorem, calculate the steady state error ess of the closed loop system in Fig. Q5b for a unity step input keeping 2 significant digits.

Fig. Q5b: Unity feedback closed loop system.

ANSWER: ess = 0.80 (accept 0.79 to 0.81) [3 Marks]

Consider the circuit in Fig. Q5c. If I(0) = 0A and the inductor is ideal, answer the following questions:

Fig. Q5c: Circuit for question 5c.

i) What is the magnitude of the current (in amperes) at t = 30 s?

ANSWER: I= 6 (accept answers from 5.9 to 6.1) A. [1.5 Marks]

ii) How much energy is stored in the inductor at t = 90 s ?

ANSWER: Energy = 0 J. [1.5 Marks]

Fig. Q5a:

POSSIBLE ANSWERS:

Fig. Q5a: Circuit for question 5a.

; (3) 𝑣0(𝑠) = 𝐶⁄𝑠 ; (4) 𝑣0(𝑠) = 𝐶 . [3 Marks] 𝑖(𝑠) 𝑠+𝐶⁄𝑅 𝑖(𝑠) 𝑅𝐶𝑠+1

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(1)

𝑣0(𝑠) = 𝐶 ; (2) 𝑖(𝑠) 𝑠+𝐶⁄𝑅

𝑣0(𝑠) = 𝐶 𝑖(𝑠) 𝑠+𝑅𝐶

(c)

QUESTION 7

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Consider the 415V 3-phase rectifier circuit and waveform diagram in Fig. Q7 below and answer the following questions:

(a) Which diodes conduct current in the time between 11.7ms and 15ms? [2 Marks]

ANSWER: Diode 3 and diode 4

(b) What is the average voltage applied across the load? [4 Marks]

ANSWER: Vxy_avg= 560 (accept answers between 555 and 565) V.

TOTAL FOR SECTION B [33 MARKS]

SECTION C

QUESTION 8

(a) Which parameter of an ideal opamp is equal to infinity: POSSIBLE ANSWERS:

(1) input impedance; (2) output impedance; (3) NF; (4) input offset.

(b) The golden rules of opamp analysis are: POSSIBLE ANSWERS:

[1.5 Marks]

(c) A typical value of the open loop gain of a real opamp is: POSSIBLE ANSWERS:

(1) 1; (2) 10; (3) 100; (4) None of these.

(d) Single ended inverting amplifier gain is: POSSIBLE ANSWERS:

(1) equal to zero; (2) negative; (3) positive; (4) infinite.

(e) The gain of an amplifier is 40dB. If the voltage input to this amplifier is 5mV the output would be:

[3 Marks] [1.5 Marks]

[1.5 Marks]

[1.5 Marks]

(1) 20mV; (2) 200mV; (3) 0.5V; (4) 5V; QUESTION 9

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(1) The inputs are always at the same potential and the inputs draw no current; (2) The inputs are always at the same potential and the output draws no current; (3) The inputs are always at the same potential and the inputs draw infinite current; (4) The inputs are always at a negative potential and the inputs draw infinite current.

Figure Q9

(a) If Rx = 100k, Ry = 10k calculate the absolute value of the first stage gain for the instrumentation amplifier shown in Fig.Q9.

(b) If R3 = R4 = 10k, R1 = R2 = 5k calculate the absolute value of the second stage gain for the instrumentation amplifier shown in Fig.Q9.

2 (accept answers from 1.9 to 2.1)

ANSWER:

(c) If the differential gain of the first stage of the instrumentation amplifier shown in the circuit above is 100 and the resistor values associated with the second stage are R1 = 10k, R2 = 10.5k, R3 = 100k and R4 = 101k, calculate the absolute value of the 2nd stage differential gain.

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ANSWER:

21 (accept answers from 20.9 to 21.1)

[4 Marks]

[4 Marks]

10 (accept answers from 9.9 to 10.1)

ANSWER:

(d) For the same condition as in Question (c) above, calculate the absolute value of the 2nd stage common mode gain.

0.035 (accept answers from 0.034 to 0.036)

ANSWER:

(e) For the same condition as in Questions (c) & (d) above, determine the CMRR of the whole system.

[4 Marks]

27875 (accept answers from 27874 to 27876)

ANSWER:

[4 Marks]

[4 Marks]

(f) For the instrumentation amplifier shown in the circuit above, now assume that the differential gain of the first stage is 200, the differential gain of the second stage is 5 and the common mode gain of the second stage is 0.1. Then, calculate the absolute value of Vo if V1 = V2 = 10 V.

1 (accept answers from 0.9 to 1.0)

ANSWER:

END

[4 Marks]

TOTAL FOR SECTION C [33 MARKS]