# 程序代写代做代考 Midterm 2

Midterm 2

Create a circuit this is capable of doing division between two 5 bit unsigned integer numbers.

Remember that given a fraction
A
B

, A is called the dividend and B is called the divisor. The result of

the division is called the quotient. Your division circuit should be implemented using sequential logic
and should complete the division within 6 clock cycles of receiving its input. If you implement your
circuit using only combinational logic you will receive no credit.

Restricted Components
You MAY NOT USE: RAM, ROM, or the Divider.

Inputs
Name Width Description

Dividend 5 The dividend. This input will
only be valid during the first
clock tick that Divide is 1. This
means you will have to store the
Dividend.

Divisor 5 The divisor. This input will only
be valid during the first clock
tick that Divide is 1. This means
you will have to store the
Divisor.

Divide 1 When divide is 1 your process
for division of the dividend by
the divisor should start. Once
ignore Divide until the division
is complete. When divide is 0
same.

Outputs
Name Width Description

perform the next division and 0
if it is currently doing division.
When Ready is 1 it also signifies
that you have completed your
division.

Quotient 5 The quotient. On start up this
value should be 0. If after
completing the division, divide is
0 then this value should continue
to hold the quotient of the most
recent division. While doing
division this value is a don’t care.

Remainder 5 The remainder. If after
completing the division, divide is
0 then this value should continue
to hold the remainder of the most
recent division. While doing
division this value is a don’t care.

Hints
1. First write a program that does integer division on unsigned numbers. This will help you to

think about how to implement it in hardware. Try to keep in mind the limitations of the
hardware and the fact that your solution must complete within 6 clock cycles.
1. Completing within 6 clock basically means that you can’t have a for/while loop that runs for

more than 6 iterations.
2. Components I used but not their counts: Register, Shift Register, Comparator, Mux, basic logic

gates, bit shifter, bit extender, Subtractor, Counter, Constant, Ground, and Splitter.

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