CS代考计算机代写 Combinatorial Circuits

Combinatorial Circuits

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Overview á How to build an adder
á Commoncombinationalcircuits ± Decoders and encoders
± Multiplexors
± Read-only memory
± Programmable logic array ± Arithmetic logic unit

The Big Picture Again

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Combinational Circuits
á Combinational/Combinatorial circuit: a circuit that implements a Boolean function

Circuits for Binary Arithmetic

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Half Adder á Outputs: sum and carry out
á Inputs:twobits
A B Sum Carry
0000 0110 1010 1101
Sum = A’B + AB’ Carry = AB

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C A B Sum Carry
00000 00110 01010 01101 10010 10101 11001 11111
Full Adder
á Inputs: two bits (A, B) + carry from the previous bit (C) á Outputs:sumandcarry

Common Circuits

á A decoder has n-bit input and 2n outputs
á Only one output active for each input combination
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á Opposite of a decoder
± Output only specified if one input is 1
Assume only one button can be pressed at any time

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C = S’A + SB
á TheSelector.Useoften
± 2 signals A, and B, and a selector S
S 2 2
± If S = 0, output = A
± Otherwise, output = B
Ï22 Ï22 Ï22 Ï22 Ï22 Ì22 Ï22 Ì22 Ï22 Ï22 Ì22 Ì22 Ì22 Ï22 Ï22 Ì22 Ï22 Ì22 Ì22 Ì22 Ï22 Ì22 Ì22 Ì22
Ï2 Ï2 Ì2 Ì2 Ï2 Ì2 Ï2 Ì2

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Multiplexor á Can have any number of inputs
± Given n signals, need øo}PÓv¿ selector inputs
á Three step recipe for building a multiplexor ± A decoder that generates n signals
± An array of n AND gates to combine the signals ± A single n input OR gate to compute the result

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á Eightdifferentsignals(A-H)
á 3-8 Decoder for selecting the inputs

Arrays of Logic Elements
á Manyoperationsneedtobedone on an entire word (32 bits)
á For instance, a multiplexor that selects one of two words:
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Read-only Memory (ROM)
á Inputs encode the memory address
á Outputs are the contents at each address
á Consider a circuit as a “hardwired” memory

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Programmable Logic Array (PLA) Canonical form: only two levels of gates
á The AND gates array is a product term consisting of any number of inputs or inverted inputs
á The OR gates array is a sum term consisting of any number of these product terms.

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D = A+ B + C
Programmable Logic Array (PLA)
 A ~ |  | [ = ~ |  | [ = ~ |  | [ &A||
A dot in the AND plane indicates that the input, or its inverse, occurs in the product term.
A dot in the OR plane indicates that the corresponding product term appears in the corresponding output.

Ainvert Binvert
CarryIn Operation
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Arithmetic Logic Unit (ALU)
1-Bit ALU
ADD 0 0 0 2 SUB 0 1 1 2 AND 0 0 x 0 OR 0 0 x 1 NOR 1 1 x 0 SLT 0 1 1 3

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Arithmetic Logic Unit (ALU)
32-Bit ALU

á Adder
á Commoncircuits
± Decoder and Encoder
± Multiplexor
± Read-only Memory (ROM)
± Programmable Logic Array (PLA) ± Arithmetic Logic Unit (ALU)
á Textbook: Appendix B.8 of 5th and 6th edition
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