程序代写 MIPS Assembler Exceptions, Interrupt and I/O – cscodehelp代写

MIPS Assembler Exceptions, Interrupt and I/O

Learning goals
• What is an exception? What is an interrupt? • Managing run-time exceptions in MIPS.

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• What is memory-mapped IO?
• Interrupt vs poll-based IO.

• OS is a program with escalated privileges that virtualises resources and device access to programs.
– Physical memory, CPU time, terminal.
• A syscall allows a program to request a service from the OS. – Print a message, read a character.
– Syscall instruction in MIPS.
• What about when the OS wants to talk to an application? • Run-time exception, IO event.

Coprocessors
• MIPS provides for up to 4 Coprocessors
• CP0 (System), CP1 (Floating Point), CP2+CP3 (Reserved)
• A coprocessor extends the functionality of MIPS, while sharing the instruction fetch and execution control logic of the CPU
• CP0 – System Coprocessor:
• Abstraction of the functions necessary to support an OS
• Exception handling, memory management, scheduling, …
• The interface to CP0 is through various instructions
• move data to and from the CP0 registers
• specific functions that modify CP0 state

Exceptions
• An Exception is any unexpected change in flow control
• Synchronous Exception:
• Caused by an instruction in the running program
• Arithmetic exceptions, invalid memory addresses in load/store, trap instructions, …
• Asynchronous Exception:
• Caused by an I/O device requesting the processor • Also known as Hardware Interrupt

Exception Handling
Control is transferred to an exception handler
• Handling in MIPS is implemented by Coprocessor0 • Exception handling registers of CP0:
Vaddr ($8)
The invalid memory address caused by load, store, or fetch
Status ($12)
The interrupt mask and enable bits
Cause ($13)
The type of exception and any pending bits
The address of the instruction when the exception occurred

Cause Register
For handling we need to know what the exception is Exception code:
Pending Interrupt:
Description
HW Interrupt
address exception load
address exception store
Description

Exception Example
Store data at an invalid address:
li $t0, 4 #set $t0 to 4
li $a0, 5 #set $a0 to 5
sw $a0, ($t0) #write the 5 to address 4
The invalid address Address of instruction

Cause Register Example
In the example:
Cause Register:
Hex: 0x00000014
Binary: …00 00010100
shift right by 2 to obtain code exception code is 5
address exception store!
li $t0, 4 #set $t0 to 4
li $a0, 5 #set $a0 to 5
sw $a0, ($t0) #write the 5 to address 4

Exception Handler
• For a function call we use jal and jr $ra
• For an exception control is transferred to fixed
address 0x80000180
• The Exception Program Counter (EPC) register stores the address of the instruction that was executing when the exception was generated (similar to $ra)

Exception Handler Example
A simple exception handler which just skips the offending instruction
$t0, 4 #set $t0 to 4 $a0, 5 #set $a0 to 5
$a0, ($t0) #write the 5 to address 4
.ktext 0x80000180
mfc0 $k0, $14 #move EPC to $k0 addiu $k0, $k0, 4 #skip one instruction mtc0 $k0, $14 #write it back to EPC eret #jump back to EPC

Memory Mapped I/O
• MIPS uses Memory Mapped I/O
• Programs use memory addresses to control
• Any lw/sw instruction with address of 0xffff0000 or greater will access I/O devices
• Used to access data for device control
• In MARS:
• Keyboard
P&H fig. A.8.1

Keyboard Input IRQ
keyb_buf_size: .word 0 # the size of the current keyboard buffer keyb_buf: .byte 0 # the buffer with keyboard input
li $t0, 0xffff0000 # address of keyboard control register $t1, 2 # interrupt enable bit
loop: addiu $s0,$s0,1 # simple main with two counters ($s0, $s1)
$t1, ($t0) # interrupt enable bit in keyboard control register
add $s1,$zero,$zero addiu $s1,$s1,1
addiu $s1,$s1,1
addiu $s1,$s1,1
addiu $s1,$s1,1
j loop # do the main loop again

Keyboard Input IRQ
.ktext 0x80000180
mfc0 $k0, $13
#move cause from coproc0 reg $13 to $k0
KEYB:la $k0, keyb_buf
lw $k1, keyb_buf_size
addu $k1, $k1, $k0
#load address of buffer
#load current buffer size
#compute position of next character in buffer #set address of keyboard data
#load current character in keyboard data reg
#transfer the character to the buffer #load current buffer size
#increment buffer size #write incremented buffer size back
#exception return (coproc0 EPC)
addu $k1, $k1, 1
sw $k1, keyb_buf_size eret
$k0, 0xffff0004
$k0, 0($k0)
$k0, 0($k1)
$k1, keyb_buf_size
#shift right by 2
#cause is encoded in 5 bit
#cause is hardware interrupt (encoded as 0)
srl $k0, $k0, 2
andi $k0, $k0, 0x1F
beq $k0, 0, IRQ
#check other causes here
eret #exception return (coproc0 EPC)
IRQ:mfc0 $k0, $13 #move from coproc0 reg $13
andi $k1, $k0, 0x0100 #is keyboard IRQ set?
bnez $k1, KEYB #go to keyboard if so #check other IRQ bits here
eret #exception return (coproc0 EPC)

Keyboard Input IRQ
– Interrupts may have to be disabled in the exception handler
– Interrupts from an interrupt may not be a good idea
– It might be necessary to decide on an interrupt hierarchy
– Some platforms use an interrupt vector table

Alternative: Polling
• Instead of Interrupts it is possible to poll a device
– Periodic check if data is available from a device
– Does not require interrupt processing (overhead)
– Might be more beneficial in some cases (heavy load)
– Requires integration with other program elements

Keyboard Input POLL
keyb_buf_size: .word 0 # the size of the current keyboard buffer keyb_buf: .byte 0 # the buffer with keyboard input
li $t0, 0xffff0000 # address of keyboard control register $t1, 0 # disable interrupt enable bit
$t1, ($t0) # clear the interrupt enable bit addiu $s0,$s0,1
add $s1,$zero,$zero addiu $s1,$s1,1 addiu $s1,$s1,1 addiu $s1,$s1,1 addiu $s1,$s1,1
jal poll # call function to read keyboard input j loop

Keyboard Input POLL
li $t0, 0xffff0000 # address of keyboard control register
lw $t1, ($t0) andi $t1, $t1, 1 bnez $t1, read jr $ra
# read the keyboard control register
# check if data is ready # if data is ready go read it
lw $t3, 4($t0) #load current character in keyboard data reg la $t1, keyb_buf #load address of buffer
lw $t2, keyb_buf_size #load current buffer size
addu $t1, $t1, $t2
sb $t3, 0($t1)
addu $t2, $t2, 1
sw $t2, keyb_buf_size #write incremented buffer size back jr $ra
#compute position of next character in buffer #transfer the character to the buffer #increment buffer size

Exceptions, Interrupt and I/O Next
Week 12 practical solution

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