# 代写代考 PIC18 ADC Module – cscodehelp代写

Why Analog-to-Digital Conversion?
• In the physical world, everything is analog (continuous).

• We need an analog-to-digital converter to translate analog signals to digital numbers so that the microcontroller can read and process them.

Analog voltage (V)
Digital represen- tation
Or in terms of VREF- & VREF+:

e.g., V = 0, V = 5V 10-bit resolution REF- REF+ ,
ADC. Suppose the ADC results are as follows. What are the corresponding voltages?
V20 = 20×5/(210-1) = 0.0977V
V499 = 499×5/(210-1)= 2.43V
V898 = 898×5/(210-1)=4.38V

Successive Approximation

Examples of Successive Approximation

• A/D Control Register 0 (ADCON0)
• A/D Control Register 1 (ADCON1)
• A/D Control Register 2 (ADCON2)
• A/D Result High Register (ADRESH) • A/D Result Low Register (ADRESL)

• CHS3:CHS0: Analog Channel Select Bits
– PIC18F4520 has only 1 Analog-to-Digital unit
– Can only select 1 input from AN0:AN12 to be sampled and converted
• GO/DONE:
– Setting this bit starts A/D conversion – Cleared when A/D conversion is done
– Power up (1)/Shut off (0) the ADC module

Voltage Reference Configuration bits
• VCFG1: VREF- source 1 = VREF- (AN2)
• VCFG0: VREF+ source 1 = VREF+ (AN3)
A/D Port Configuration bits
PCFG<3:0> – The input analog signal must be configured as an analog input.

• Do the following two lines sound familiar?
movlw 0x0F

• ADFM: A/D Result Format Select bit

• T = time required to complete 1-bit A/D AD
conversion
• Time required for one full 10-bit A/D conversion is 11 to 12 T – Successive
• From the PIC18F4520 specification, T
approximation
must be between 0.7 – 25 μs.
• T can be specified from 2T to 64T by selecting the A/D Conversion Clock Select Bits (ADCS<0:2> in ADCON2).

How should T be set? AD
• e.g., If a 4MHz clock is installed, T =
• The minimum T that can be set is 4T .
64T (16μs). osc
• T can be chosen from 4T
osc (1μs) to

Sample-and-hold circuit
• This circuit ensures that the analog input voltage is stable throughout the A/D conversion process.
• The time required to reach steady state depends on Rs, RIC, Rss and CHOLD.

A/D Acquisition Time (ACQT)
• The minimum acquisition time (T ) for
PIC18F4520 is 1.4μs.
• ADC module will insert an acquisition time between the GO/DONE bit is set and when the conversion starts.
• Suppose T = 1μs. T >= 2 T AD ACQ AD
• T is set by setting ACQT<0:2> of ACQ

A/D Conversion Process
1. Set GO/DONE bit
2. Wait T to charge up C ACQ
3. CHOLD is disconnected and ADC begins
5. When finished:
– GO/DONE bit is cleared

movlw movwf
movlw movwf
movlw movwf
;Set RA0 Analog Port, others Digital I/O
; set PORTD output
; start Conversion
;display Top 8 bit
clrf TRISD

Assume fOSC = 4MHz, write a few instructions to turn on and configure a PIC ADC with the following requirements:
• ADC converts the analog signal fed into Channel AN3.
• ADC result is left justified.
• Select VDD and VSS as reference voltages.
• T must be at least 2.5 μs.
must be at least 18 μs.

You should be able to …
– Which channel to convert?